diff options
| author | Frans Hendriks <fhendriks@eltan.com> | 2018-10-26 12:29:28 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-02-28 14:16:14 +0000 |
| commit | 3e8504a325007cfbc6fdaa5e034ddea0657ee737 (patch) | |
| tree | d2c0f056bc6d57acd81621e4e647f7a22ebf49b3 /src/soc/intel/braswell/acpi | |
| parent | b28025a434cfb955a253a5b4d71e26e00f44a80d (diff) | |
| download | coreboot-3e8504a325007cfbc6fdaa5e034ddea0657ee737.tar.xz | |
src/soc/intel/braswell/acpi/irqlinks.asl: Allow IRQ10 and 11 for all LNKx
IRQ10 and 11 are not available as _PRS in all LNKx ResourceTemplates.
These interrupt numbers are added to all LNKx.
BUG=N/A
TEST=Intel CherryHill CRB
Change-Id: Ie7a263d7d50f7f85e6195777c1429dcc27a15604
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/29287
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/acpi')
| -rw-r--r-- | src/soc/intel/braswell/acpi/irqlinks.asl | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/soc/intel/braswell/acpi/irqlinks.asl b/src/soc/intel/braswell/acpi/irqlinks.asl index a160f6e7eb..a943c88a15 100644 --- a/src/soc/intel/braswell/acpi/irqlinks.asl +++ b/src/soc/intel/braswell/acpi/irqlinks.asl @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2018 Eltan B.V. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -29,7 +30,7 @@ Device (LNKA) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 10, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -88,7 +89,7 @@ Device (LNKB) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 11, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -147,7 +148,7 @@ Device (LNKC) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 10, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -206,7 +207,7 @@ Device (LNKD) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 11, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -265,7 +266,7 @@ Device (LNKE) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 10, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -324,7 +325,7 @@ Device (LNKF) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 11, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -383,7 +384,7 @@ Device (LNKG) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 10, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ @@ -442,7 +443,7 @@ Device (LNKH) Name (_PRS, ResourceTemplate() { IRQ(Level, ActiveLow, Shared) - { 1, 3, 4, 5, 6, 7, 11, 12, 14, 15 } + { 1, 3, 4, 5, 6, 7, 10, 11, 12, 14, 15 } }) /* Current Resource Settings for this link */ |