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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-20 18:36:37 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-22 12:22:15 +0000 |
| commit | 25200327d9487e8948da8c9cbb3331e8bb00f8c9 (patch) | |
| tree | 30629145d15819847963c03604f37c578c9b144e /src/soc/intel/braswell/pcie.c | |
| parent | 0ea04f58531774411f1143ebf1a7a0dc70c7a48c (diff) | |
| download | coreboot-25200327d9487e8948da8c9cbb3331e8bb00f8c9.tar.xz | |
soc/intel/{baytrail,braswell}: Make use of generic set_subsystem()
We missed some PCIe root ports with previous cleanup.
Change-Id: I8bf8f8b2ca1836316f84fb7f01820a00d7194d51
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell/pcie.c')
| -rw-r--r-- | src/soc/intel/braswell/pcie.c | 14 |
1 files changed, 1 insertions, 13 deletions
diff --git a/src/soc/intel/braswell/pcie.c b/src/soc/intel/braswell/pcie.c index 84949748fc..6e387d1d6b 100644 --- a/src/soc/intel/braswell/pcie.c +++ b/src/soc/intel/braswell/pcie.c @@ -160,20 +160,8 @@ static void pcie_enable(struct device *dev) southcluster_enable_dev(dev); } -static void pcie_root_set_subsystem(struct device *dev, unsigned int vid, - unsigned int did) -{ - printk(BIOS_SPEW, "%s/%s (%s, 0x%04x, 0x%04x)\n", - __FILE__, __func__, dev_name(dev), vid, did); - uint32_t didvid = ((did & 0xffff) << 16) | (vid & 0xffff); - - if (!didvid) - didvid = pci_read_config32(dev, PCI_VENDOR_ID); - pci_write_config32(dev, 0x94, didvid); -} - static struct pci_operations pcie_root_ops = { - .set_subsystem = &pcie_root_set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static struct device_operations device_ops = { |