summaryrefslogtreecommitdiff
path: root/src/soc/intel/braswell/placeholders.c
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2015-05-05 15:07:29 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2015-05-23 01:40:57 +0200
commit77ff0b1a01d3d640be55d301b2fcf09a3f840ffe (patch)
treec745968f84ca4638f3a27881a5ee3943cf39773f /src/soc/intel/braswell/placeholders.c
parentb5ad827ee584a960212ae983e30cd1a0b18c55a5 (diff)
downloadcoreboot-77ff0b1a01d3d640be55d301b2fcf09a3f840ffe.tar.xz
Braswell: Use Baytrail as Comparison Base
Add baytrail source for comparison with Braswell. BRANCH=none BUG=None TEST=None Change-Id: I5170addf41676d95a3daf070a32bcee085f8156d Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10117 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/placeholders.c')
-rw-r--r--src/soc/intel/braswell/placeholders.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/placeholders.c b/src/soc/intel/braswell/placeholders.c
new file mode 100644
index 0000000000..3495c30c72
--- /dev/null
+++ b/src/soc/intel/braswell/placeholders.c
@@ -0,0 +1,11 @@
+
+#include <arch/acpi.h>
+#include <cpu/cpu.h>
+#include <device/pci_rom.h>
+#include <soc/acpi.h>
+
+
+void smm_init(void) {}
+
+/* Rmodules don't like weak symbols. */
+u32 map_oprom_vendev(u32 vendev) { return vendev; }