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author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-07-02 11:55:18 -0700 |
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committer | Leroy P Leahy <leroy.p.leahy@intel.com> | 2015-07-06 18:45:23 +0200 |
commit | acb9c0b6616f96357c303964678eac05177a078d (patch) | |
tree | 31991144e04b437bb078d8b6a66bc3c081d16da8 /src/soc/intel/braswell/spi.c | |
parent | 2bc9cee0f70f133bb31a79b92ea4d982d55d048d (diff) | |
download | coreboot-acb9c0b6616f96357c303964678eac05177a078d.tar.xz |
Braswell: Update to end of June.
Remove some CamelCase in acpi.c
Add FSP PcdDvfsEnable configuration parameter.
Add lpc_init and lpc_set_low_power routines.
Remove Braswell reference to make code easier to port to another SOC.
BRANCH=none
BUG=None
TEST=Build and run on cyan
Change-Id: I5063215fc5d19b4a07f3161f76bf3d58e30f6f02
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10768
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell/spi.c')
-rw-r--r-- | src/soc/intel/braswell/spi.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index 16fb465037..afc288a36a 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -26,6 +26,7 @@ #include <console/console.h> #include <delay.h> #include <device/pci_ids.h> +#include <rules.h> #include <soc/lpc.h> #include <soc/pci_devs.h> #include <spi_flash.h> @@ -33,7 +34,7 @@ #include <stdlib.h> #include <string.h> -#ifdef __SMM__ +#if ENV_SMM #define pci_read_config_byte(dev, reg, targ)\ *(targ) = pci_read_config8(dev, reg) #define pci_read_config_word(dev, reg, targ)\ @@ -46,7 +47,7 @@ pci_write_config16(dev, reg, val) #define pci_write_config_dword(dev, reg, val)\ pci_write_config32(dev, reg, val) -#else /* !__SMM__ */ +#else /* ENV_SMM */ #include <device/device.h> #include <device/pci.h> #define pci_read_config_byte(dev, reg, targ)\ @@ -61,7 +62,7 @@ pci_write_config16(dev, reg, val) #define pci_write_config_dword(dev, reg, val)\ pci_write_config32(dev, reg, val) -#endif /* !__SMM__ */ +#endif /* ENV_SMM */ typedef struct spi_slave ich_spi_slave; @@ -255,7 +256,7 @@ static ich9_spi_regs *spi_regs(void) device_t dev; uint32_t sbase; -#ifdef __SMM__ +#if ENV_SMM dev = PCI_DEV(0, LPC_DEV, LPC_FUNC); #else dev = dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); |