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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2018-08-23 11:39:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-08-24 15:36:07 +0000 |
| commit | 9116eb660eac5fe906f8968704f3daa739c1a8e9 (patch) | |
| tree | de47c622b9ad9162be113d011a80bb6859707db2 /src/soc/intel/braswell | |
| parent | 31a4700ce9fbd1a4a04e88198e18d50cd9a81897 (diff) | |
| download | coreboot-9116eb660eac5fe906f8968704f3daa739c1a8e9.tar.xz | |
soc/intel/apollolake: Make eMMC max speed configurable
The eMMC maximum speed is set to HS400 mode per default. To increase the
lifetime of the circuit, it is necessary to reduce the eMMC speed.
Change-Id: I6fa5eb56a0593e24269ef143645c506232879889
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/28282
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions