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author | Jonathan Zhang <jonzhang@fb.com> | 2020-04-27 18:37:39 -0700 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 12:20:51 +0000 |
commit | 7ba0e9912781f8d650bcef6a362da6575b59d59b (patch) | |
tree | b0ce4a16ab41131fb16d4603c6626e20d094bddb /src/soc/intel/braswell | |
parent | 0df0c7e359b6e678cb6de8f946d4395259864391 (diff) | |
download | coreboot-7ba0e9912781f8d650bcef6a362da6575b59d59b.tar.xz |
soc/intel/xeon_sp/cpx: update ACPI xSDT
Add uncore devices, interrupt definition, gnvs to xSDT tables.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Signed-off-by: Reddy Chagam <anjaneya.chagam@intel.com>
Change-Id: I2fa9c26abc6aef2d255535c2abf8b6b67d26359f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40927
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
0 files changed, 0 insertions, 0 deletions