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authorFrans Hendriks <fhendriks@eltan.com>2019-04-25 11:17:05 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-07-10 10:13:03 +0000
commit6665da81ef289e9ba478e93b6c41928fa19f7d28 (patch)
treece5f4c1d0c98b187a30e8aad4a2edaecf9e73175 /src/soc/intel/braswell
parent0d9f4e92776846554607902c188a389e4aee1f8e (diff)
downloadcoreboot-6665da81ef289e9ba478e93b6c41928fa19f7d28.tar.xz
soc/intel/braswell/acpi/lpc.asl: Allocate used ROM size only
Fixed ROM area is allocated. Reduce the ROM size using CONFIG_COREBOOT_ROMSIZE. BUG=N/A TEST=Facebook FBG-1701 booting Embedded Linux Change-Id: I7a47bf2600f546271c5a65641d29f868ff2748bf Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31822 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r--src/soc/intel/braswell/acpi/lpc.asl16
1 files changed, 13 insertions, 3 deletions
diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl
index 6b2ececc40..9caa8f17eb 100644
--- a/src/soc/intel/braswell/acpi/lpc.asl
+++ b/src/soc/intel/braswell/acpi/lpc.asl
@@ -3,7 +3,7 @@
*
* Copyright (C) 2007-2009 coresystems GmbH
* Copyright (C) 2013 Google Inc.
- * Copyright (C) 2018 Eltan B.V.
+ * Copyright (C) 2018-2019 Eltan B.V.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
@@ -42,10 +42,20 @@ Device (LPCB)
Device (FWH) /* Firmware Hub */
{
Name (_HID, EISAID("INT0800"))
- Name (_CRS, ResourceTemplate()
+ Name (RBUF, ResourceTemplate()
{
- Memory32Fixed(ReadOnly, 0xff000000, 0x01000000)
+ Memory32Fixed(ReadOnly, 0, 0, FBAR)
})
+
+ Method (_CRS)
+ {
+ CreateDwordField (^RBUF, ^FBAR._BAS, FBAS)
+ CreateDwordField (^RBUF, ^FBAR._LEN, FLEN)
+ Multiply(CONFIG_COREBOOT_ROMSIZE_KB, 1024, Local0)
+ Store(Local0, FLEN)
+ Add(Subtract(0xffffffff, Local0), 1, FBAS)
+ Return (^RBUF)
+ }
}
#if !CONFIG(DISABLE_HPET)