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authorLee Leahy <leroy.p.leahy@intel.com>2015-09-17 12:35:10 -0700
committerAaron Durbin <adurbin@gmail.com>2015-10-11 23:55:34 +0000
commit3c4053fa59a8654b2f10cf175915914c37da9daf (patch)
tree660bb7b5670d355cf556e0ac3780ec9a6fe5a42c /src/soc/intel/braswell
parent13cd3310a55c5683fb0b1176444ad8f5e5243945 (diff)
downloadcoreboot-3c4053fa59a8654b2f10cf175915914c37da9daf.tar.xz
intel SOC common: Remove unused parameters
Eliminate unused parameters from the console initialization. BRANCH=none BUG=chrome-os-partner:44827 TEST=Build and run on kunimitsu Original-Change-Id: Iacacea292d43615e9d2f8e5d3ec67e77f3f08906 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/301204 Original-Commit-Ready: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org> Change-Id: I3a0ea948ce106b07cb6aa872375ce588317dc437 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11814 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/braswell')
-rw-r--r--src/soc/intel/braswell/romstage/romstage.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c
index 2286cd48e7..00710fe837 100644
--- a/src/soc/intel/braswell/romstage/romstage.c
+++ b/src/soc/intel/braswell/romstage/romstage.c
@@ -170,7 +170,7 @@ int chipset_prev_sleep_state(struct chipset_power_state *ps)
}
/* SOC initialization before the console is enabled */
-void soc_pre_console_init(struct romstage_params *params)
+void soc_pre_console_init(void)
{
/* Early chipset initialization */
program_base_addresses();