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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-06 12:31:34 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-01-09 21:25:41 +0000 |
| commit | 1cae45432e90488c2e9e9ce635fece26ca4c2268 (patch) | |
| tree | 14b3c1a7d47c8c1b41aba64d6f72050a74a9625c /src/soc/intel/braswell | |
| parent | 5e9ae0c2bcabf3f2226265fcd8ce643ed97f1567 (diff) | |
| download | coreboot-1cae45432e90488c2e9e9ce635fece26ca4c2268.tar.xz | |
device,sb/intel: Move SMBus host controller prototypes
Also change some of the types to match the register widths
of the controller. It is expected that these prototypes
will be used with SMBus host controllers inside AMD chipsets
as well, thus the change of location.
Change-Id: I88fe834f3eee7b7bfeff02f91a1c25bb5aee9b65
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38226
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/smbus.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/smbus.c b/src/soc/intel/braswell/smbus.c index abf2fea89f..a1a0a89598 100644 --- a/src/soc/intel/braswell/smbus.c +++ b/src/soc/intel/braswell/smbus.c @@ -20,8 +20,8 @@ #include <device/pci_def.h> #include <device/pci_type.h> #include <device/pci_ops.h> +#include <device/smbus_host.h> #include <soc/smbus.h> -#include <southbridge/intel/common/smbus.h> int smbus_i2c_block_write(u8 addr, u8 bytes, u8 *buf) { |