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| author | Iru Cai <mytbk920423@gmail.com> | 2020-11-02 13:13:32 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2020-11-15 11:00:58 +0800 |
| commit | b42967112f2e907e6c3b5dc47b424f8a1d7eb50e (patch) | |
| tree | 0b2cd38e9ab8f47c649aedde06cd88f36ef705c2 /src/soc/intel/broadwell/Makefile.inc | |
| parent | a241ee387dd42d4e7494212ff72adecde35ec6d4 (diff) | |
| download | coreboot-b42967112f2e907e6c3b5dc47b424f8a1d7eb50e.tar.xz | |
add broadwell_refcode.asm
Diffstat (limited to 'src/soc/intel/broadwell/Makefile.inc')
| -rw-r--r-- | src/soc/intel/broadwell/Makefile.inc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 7ee69908f8..f8743cf7b5 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -2,6 +2,7 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y) subdirs-y += cpu subdirs-y += pch +subdirs-y += refcode bootblock-y += bootblock.c @@ -20,7 +21,7 @@ ramstage-y += minihd.c ramstage-y += pei_data.c romstage-y += pei_data.c ramstage-y += ramstage.c -ramstage-$(CONFIG_HAVE_REFCODE_BLOB) += refcode.c +ramstage-y += refcode.c ramstage-y += systemagent.c CPPFLAGS_common += -Isrc/soc/intel/broadwell/include |