diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-03 07:30:26 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-12-14 14:08:57 +0000 |
| commit | de640781020b10e72dd6a5cda26cab10932e94fe (patch) | |
| tree | f3e43318b33a10918c906458e6b03b2a2194d7ee /src/soc/intel/broadwell/bootblock | |
| parent | 91c47c0deac054d5b949d1bf1be7c0e7cbf7d545 (diff) | |
| download | coreboot-de640781020b10e72dd6a5cda26cab10932e94fe.tar.xz | |
bootblock: Provide some common prototypes
The split of bootblock initialisation to cpu, northbridge and
southbridge is not specific to intel at all, create new header
<arch/bootblock.h> as AMD will want some of these too.
Change-Id: I702cc6bad4afee4f61acf58b9155608b28eb417e
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37429
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell/bootblock')
| -rw-r--r-- | src/soc/intel/broadwell/bootblock/cpu.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/bootblock/pch.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/bootblock/systemagent.c | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c index f3c35f3441..4c6ab75ef9 100644 --- a/src/soc/intel/broadwell/bootblock/cpu.c +++ b/src/soc/intel/broadwell/bootblock/cpu.c @@ -14,15 +14,15 @@ */ #include <stdint.h> +#include <arch/bootblock.h> +#include <arch/io.h> #include <cpu/x86/cache.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> -#include <arch/io.h> #include <halt.h> #include <soc/rcba.h> #include <soc/msr.h> #include <delay.h> -#include <cpu/intel/car/bootblock.h> static void set_flex_ratio_to_tdp_nominal(void) { diff --git a/src/soc/intel/broadwell/bootblock/pch.c b/src/soc/intel/broadwell/bootblock/pch.c index 590961b361..7ea4a58e1f 100644 --- a/src/soc/intel/broadwell/bootblock/pch.c +++ b/src/soc/intel/broadwell/bootblock/pch.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <arch/bootblock.h> #include <device/pci_ops.h> #include <soc/iomap.h> #include <soc/lpc.h> @@ -22,7 +23,6 @@ #include <reg_script.h> #include <soc/pm.h> #include <soc/romstage.h> -#include <cpu/intel/car/bootblock.h> /* * Enable Prefetching and Caching. diff --git a/src/soc/intel/broadwell/bootblock/systemagent.c b/src/soc/intel/broadwell/bootblock/systemagent.c index 7aaed789ac..c9c7d95ca6 100644 --- a/src/soc/intel/broadwell/bootblock/systemagent.c +++ b/src/soc/intel/broadwell/bootblock/systemagent.c @@ -13,10 +13,10 @@ * GNU General Public License for more details. */ +#include <arch/bootblock.h> #include <device/pci_ops.h> #include <soc/pci_devs.h> #include <soc/systemagent.h> -#include <cpu/intel/car/bootblock.h> void bootblock_early_northbridge_init(void) { |