summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/cpu.c
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2017-03-16 18:47:55 -0700
committerLee Leahy <leroy.p.leahy@intel.com>2017-03-17 18:03:36 +0100
commit26b7cd0fa86562402b72509319a2b98ce8c21a8e (patch)
tree4638074e1b48e59dd6def3baefca67c49faceea3 /src/soc/intel/broadwell/cpu.c
parent75042683183d3b559bcec702e9bc9f0e6da3ec8b (diff)
downloadcoreboot-26b7cd0fa86562402b72509319a2b98ce8c21a8e.tar.xz
soc/intel/broadwell: Fix spacing issues detected by checkpatch
Fix the following errors and warnings detected by checkpatch.pl: ERROR: code indent should use tabs where possible ERROR: space required after that ',' (ctx:VxV) ERROR: space prohibited before that ',' (ctx:WxW) ERROR: spaces required around that '=' (ctx:VxV) ERROR: spaces required around that '<=' (ctx:WxV) ERROR: spaces required around that '<=' (ctx:VxV) ERROR: spaces required around that '>' (ctx:VxV) ERROR: spaces required around that '>=' (ctx:VxV) ERROR: spaces required around that '+=' (ctx:VxV) ERROR: spaces required around that '<' (ctx:VxV) ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" ERROR: space required before the open parenthesis '(' WARNING: space prohibited between function name and open parenthesis '(' WARNING: please, no space before tabs WARNING: please, no spaces at the start of a line False positives are generated for the following test: WARNING: space prohibited between function name and open parenthesis '(' in both pei_data.h and pei_wrapper.h TEST=None Change-Id: Icab08e5fcb6d5089902ae5ec2aa5bbee5ac432ed Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/18872 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/cpu.c')
-rw-r--r--src/soc/intel/broadwell/cpu.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/cpu.c b/src/soc/intel/broadwell/cpu.c
index 09fe5ac99c..cc26c752bb 100644
--- a/src/soc/intel/broadwell/cpu.c
+++ b/src/soc/intel/broadwell/cpu.c
@@ -270,7 +270,7 @@ static void configure_pch_power_sharing(void)
pch_power_ext = pcode_mailbox_read(MAILBOX_BIOS_CMD_READ_PCH_POWER_EXT);
printk(BIOS_INFO, "PCH Power: PCODE Levels 0x%08x 0x%08x\n",
- pch_power, pch_power_ext);
+ pch_power, pch_power_ext);
pmsync = RCBA32(PMSYNC_CONFIG);
pmsync2 = RCBA32(PMSYNC_CONFIG2);
@@ -434,19 +434,19 @@ static void configure_c_states(void)
/* C-state Interrupt Response Latency Control 3 - package C8 */
msr.hi = 0;
msr.lo = IRTL_VALID | IRTL_1024_NS |
- C_STATE_LATENCY_CONTROL_3_LIMIT;
+ C_STATE_LATENCY_CONTROL_3_LIMIT;
wrmsr(MSR_C_STATE_LATENCY_CONTROL_3, msr);
/* C-state Interrupt Response Latency Control 4 - package C9 */
msr.hi = 0;
msr.lo = IRTL_VALID | IRTL_1024_NS |
- C_STATE_LATENCY_CONTROL_4_LIMIT;
+ C_STATE_LATENCY_CONTROL_4_LIMIT;
wrmsr(MSR_C_STATE_LATENCY_CONTROL_4, msr);
/* C-state Interrupt Response Latency Control 5 - package C10 */
msr.hi = 0;
msr.lo = IRTL_VALID | IRTL_1024_NS |
- C_STATE_LATENCY_CONTROL_5_LIMIT;
+ C_STATE_LATENCY_CONTROL_5_LIMIT;
wrmsr(MSR_C_STATE_LATENCY_CONTROL_5, msr);
}
@@ -472,7 +472,7 @@ static void configure_misc(void)
msr = rdmsr(IA32_MISC_ENABLE);
msr.lo |= (1 << 0); /* Fast String enable */
- msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */
+ msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */
msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */
wrmsr(IA32_MISC_ENABLE, msr);