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| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-23 13:17:56 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2021-01-10 16:11:32 +0000 |
| commit | 9a1b720b1f9ea5e589c3e93d16e9a161683f2a4d (patch) | |
| tree | 84f6773071e5bc8f8f7052abf312974cfda5af49 /src/soc/intel/broadwell/include | |
| parent | 03d9298490b452e53a9568d13c7e8c0119bb2e74 (diff) | |
| download | coreboot-9a1b720b1f9ea5e589c3e93d16e9a161683f2a4d.tar.xz | |
soc/intel/broadwell: Use `mp_cpu_bus_init`
This is needed to allow switching to Haswell CPU code in the future.
Change-Id: Ic642f32f9c4a269a66ac470b7a7217f20ff8bfba
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46886
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/include')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/ramstage.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/include/soc/ramstage.h b/src/soc/intel/broadwell/include/soc/ramstage.h index 5d7eceb4a5..4d057ace11 100644 --- a/src/soc/intel/broadwell/include/soc/ramstage.h +++ b/src/soc/intel/broadwell/include/soc/ramstage.h @@ -7,7 +7,6 @@ #include <soc/intel/broadwell/chip.h> void broadwell_init_pre_device(void *chip_info); -void broadwell_init_cpus(struct device *dev); #if CONFIG(HAVE_REFCODE_BLOB) void broadwell_run_reference_code(void); |