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authorArthur Heymans <arthur@aheymans.xyz>2018-11-29 13:36:54 +0100
committerPatrick Georgi <pgeorgi@google.com>2018-12-05 13:32:42 +0000
commit90cca5422d2d44ee96cbcd420a878b2fb1b3e111 (patch)
tree8d5f2e8c8b54ae2a0c69a8eb2e673d4feb03efe9 /src/soc/intel/broadwell/include
parent9fca297ca44eb388229523f820f57f795b49af15 (diff)
downloadcoreboot-90cca5422d2d44ee96cbcd420a878b2fb1b3e111.tar.xz
soc/intel/broadwell: Implement postcar stage
This does the following: - Reuse the cpu/intel/car/non-evict CAR setup and exit. - Use postcar_frame functions to set up the postcar frame Change-Id: I428832a2d7e46ce61a7f9bd498b609feb4518eb0 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/include')
-rw-r--r--src/soc/intel/broadwell/include/soc/pci_devs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pci_devs.h b/src/soc/intel/broadwell/include/soc/pci_devs.h
index 0880353999..a46f9fcce2 100644
--- a/src/soc/intel/broadwell/include/soc/pci_devs.h
+++ b/src/soc/intel/broadwell/include/soc/pci_devs.h
@@ -19,7 +19,7 @@
#define _SA_DEVFN(slot) PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEVFN(slot, func) PCI_DEVFN(PCH_DEV_SLOT_ ## slot, func)
-#if defined(__PRE_RAM__) || defined(__SMM__) || defined(__ROMCC__)
+#if defined(__SIMPLE_DEVICE__)
#include <arch/io.h>
#define _SA_DEV(slot) PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
#define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_ ## slot, func)