diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 10:56:08 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 19:21:53 +0100 |
| commit | 6ef5192627b07662e641feb5049f4183edde9105 (patch) | |
| tree | a8a07245b7e93a90abeb3da9a63b022730ce8a7c /src/soc/intel/broadwell/include | |
| parent | 8a9c7dc08712e71bec5bc92bbaf93bf43126cd0d (diff) | |
| download | coreboot-6ef5192627b07662e641feb5049f4183edde9105.tar.xz | |
soc/intel/broadwell: Fix other issues detected by checkpatch
Fix the following error and warnings detected by checkpatch.pl:
ERROR: switch and case should be at the same indent
WARNING: line over 80 characters
WARNING: storage class should be at the beginning of the declaration
WARNING: adding a line without newline at end of file
WARNING: __func__ should be used instead of gcc specific __FUNCTION__
WARNING: Comparisons should place the constant on the right side of the test
TEST=None
Change-Id: I85c400e4a087996fc81ab8b0e5422ba31df3c982
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18885
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/include')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/igd.h | 2 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/romstage.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/broadwell/include/soc/igd.h b/src/soc/intel/broadwell/include/soc/igd.h index e7d3777045..cdbee4ba38 100644 --- a/src/soc/intel/broadwell/include/soc/igd.h +++ b/src/soc/intel/broadwell/include/soc/igd.h @@ -17,4 +17,4 @@ u32 igd_get_reg_em4(void); u32 igd_get_reg_em5(void); -#endif /* SOC_INTEL_BROADWELL_GMA_H */
\ No newline at end of file +#endif /* SOC_INTEL_BROADWELL_GMA_H */ diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index ec733f855c..eb4e097f00 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -29,9 +29,9 @@ struct romstage_params { void mainboard_romstage_entry(struct romstage_params *params); void romstage_common(struct romstage_params *params); -void *asmlinkage romstage_main(unsigned long bist, uint32_t tsc_lo, +asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo, uint32_t tsc_high); -void asmlinkage romstage_after_car(void); +asmlinkage void romstage_after_car(void); void raminit(struct pei_data *pei_data); void *setup_stack_and_mttrs(void); |