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author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-04-25 15:50:27 +0200 |
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committer | Martin Roth <martinroth@google.com> | 2018-04-26 21:33:39 +0000 |
commit | bc8762eaef571da9f4681d09a8ec6d2a501a8115 (patch) | |
tree | 4831a844a0a5019b951bf650599de794282a273b /src/soc/intel/broadwell/include | |
parent | 570b183f7ef72dbc5d4575719cdd582c88c37d8b (diff) | |
download | coreboot-bc8762eaef571da9f4681d09a8ec6d2a501a8115.tar.xz |
src: Fix a typo on "mtrr"
Change "mttrs" to mtrrs.
Change-Id: I4e5930cdcba5e8f5366bb2d4ebbcb659c0c2eb27
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/25823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/broadwell/include')
-rw-r--r-- | src/soc/intel/broadwell/include/soc/romstage.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/include/soc/romstage.h b/src/soc/intel/broadwell/include/soc/romstage.h index eb4e097f00..e52004bfd5 100644 --- a/src/soc/intel/broadwell/include/soc/romstage.h +++ b/src/soc/intel/broadwell/include/soc/romstage.h @@ -33,7 +33,7 @@ asmlinkage void *romstage_main(unsigned long bist, uint32_t tsc_lo, uint32_t tsc_high); asmlinkage void romstage_after_car(void); void raminit(struct pei_data *pei_data); -void *setup_stack_and_mttrs(void); +void *setup_stack_and_mtrrs(void); struct chipset_power_state; struct chipset_power_state *fill_power_state(void); |