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author | Arthur Heymans <arthur@aheymans.xyz> | 2019-06-04 14:12:01 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2019-11-10 22:40:59 +0000 |
commit | 2abbe467658a8e4479c381330e85e126c8f42a90 (patch) | |
tree | 814bb1a711c25c03e9b502520336bfdd98cad2df /src/soc/intel/broadwell/lpc.c | |
parent | 1d4bdda47f030d01418936d3399856dddfa7f43b (diff) | |
download | coreboot-2abbe467658a8e4479c381330e85e126c8f42a90.tar.xz |
soc/intel/broadwell: Use common SB RTC code
Change-Id: Iedb9a8962ac1b4107e9192b0be610fb92d2cfdc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell/lpc.c')
-rw-r--r-- | src/soc/intel/broadwell/lpc.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index 873f594530..3392614303 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -42,6 +42,7 @@ #include <soc/rcba.h> #include <soc/intel/broadwell/chip.h> #include <arch/acpigen.h> +#include <southbridge/intel/common/rtc.h> static void pch_enable_ioapic(struct device *dev) { @@ -190,11 +191,6 @@ static void pch_power_options(struct device *dev) enable_alt_smi(config->alt_gp_smi_en); } -static void pch_rtc_init(struct device *dev) -{ - cmos_init(rtc_failure()); -} - static const struct reg_script pch_misc_init_script[] = { /* Setup SLP signal assertion, SLP_S4=4s, SLP_S3=50ms */ REG_PCI_RMW16(GEN_PMCON_3, ~((3 << 4)|(1 << 10)), @@ -439,7 +435,7 @@ static void lpc_init(struct device *dev) { /* Legacy initialization */ isa_dma_init(); - pch_rtc_init(dev); + sb_rtc_init(); reg_script_run_on_dev(dev, pch_misc_init_script); /* Interrupt configuration */ |