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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-12 13:10:19 +0300
committerMartin Roth <martinroth@google.com>2019-07-21 18:58:01 +0000
commit71756c21afd14f4114c597487406eb53e23730b2 (patch)
tree7ccb61cf5eb3a5b3fb3024327fce58d141c4e928 /src/soc/intel/broadwell/lpc.c
parent6046eb405a4f1cbb4df1ed0d23276f333bc0998b (diff)
downloadcoreboot-71756c21afd14f4114c597487406eb53e23730b2.tar.xz
soc/intel: Expand SA_DEV_ROOT for ramstage
We do not want to disguise somewhat complex function calls as simple macros. Change-Id: I298f7f9a1c6a64cfba454e919eeaedc7bb2d4801 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/broadwell/lpc.c')
-rw-r--r--src/soc/intel/broadwell/lpc.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c
index 9be4aebdd2..b385d6b637 100644
--- a/src/soc/intel/broadwell/lpc.c
+++ b/src/soc/intel/broadwell/lpc.c
@@ -365,6 +365,7 @@ static void pch_cg_init(struct device *dev)
{
u32 reg32;
u16 reg16;
+ struct device *igd_dev = pcidev_path_on_root(SA_DEVFN_IGD);
/* DMI */
RCBA32_OR(0x2234, 0xf);
@@ -388,7 +389,7 @@ static void pch_cg_init(struct device *dev)
RCBA32_AND_OR(0x2614, ~0x64ff0000, 0x0a206500);
/* Check for 0:2.0@0x08 >= 0x0b */
- if (pch_is_wpt() || pci_read_config8(SA_DEV_IGD, 0x8) >= 0x0b)
+ if (pch_is_wpt() || pci_read_config8(igd_dev, 0x8) >= 0x0b)
RCBA32_OR(0x2614, (1 << 26));
RCBA32_OR(0x900, 0x0000031f);