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authorIru Cai <mytbk920423@gmail.com>2020-12-30 19:30:30 +0800
committerIru Cai <mytbk920423@gmail.com>2020-12-30 19:30:30 +0800
commit1da105df18417410462f1b8cbff9e5241bd2dd3d (patch)
treea05e981cabf4d88b80677f104f51fc5058c4155c /src/soc/intel/broadwell/refcode/usb.c
parentf51fc1ffb484b94255a94fd935ae8cda4e6c1713 (diff)
downloadcoreboot-1da105df18417410462f1b8cbff9e5241bd2dd3d.tar.xz
add PchStartUsbInit
Diffstat (limited to 'src/soc/intel/broadwell/refcode/usb.c')
-rw-r--r--src/soc/intel/broadwell/refcode/usb.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/refcode/usb.c b/src/soc/intel/broadwell/refcode/usb.c
index 818b40a59f..4b9dd99749 100644
--- a/src/soc/intel/broadwell/refcode/usb.c
+++ b/src/soc/intel/broadwell/refcode/usb.c
@@ -1,5 +1,6 @@
#define __SIMPLE_DEVICE__ 1
+#include <console/console.h>
#include <device/pci_ops.h>
#include <soc/rcba.h>
#include <soc/iobp.h>
@@ -7,6 +8,28 @@
#include "pch.h"
#include "usb.h"
+int PchStartUsbInit(void *usb_pol, uintptr_t ehcibar, uintptr_t xhcibar, uint8_t revision)
+{
+ printk(BIOS_DEBUG, "%s: revision is %d.\n", __func__, revision);
+ printk(BIOS_DEBUG, "EHCIBAR is 0x%lx, XHCIBAR is 0x%lx.\n", ehcibar, xhcibar);
+
+ if (usb_pol == NULL) {
+ printk(BIOS_ERR, "usb_pol pointer is NULL!\n");
+ return 0x80000002;
+ }
+
+ uint32_t rcba_fd = RCBA32(FD);
+
+ int ret = CommonUsbInit(usb_pol, ehcibar, xhcibar, 0, RCBA_BASE_ADDRESS, &rcba_fd,
+ revision);
+
+ if (ret < 0) {
+ printk(BIOS_ERR, "CommonUsbInit returns 0x%x!\n", ret);
+ }
+ RCBA32(FD) = rcba_fd;
+ return ret;
+}
+
static void finalize_ehci(void)
{
/*