summaryrefslogtreecommitdiff
path: root/src/soc/intel/broadwell/refcode/usb.h
diff options
context:
space:
mode:
authorIru Cai <mytbk920423@gmail.com>2020-12-30 19:30:30 +0800
committerIru Cai <mytbk920423@gmail.com>2020-12-30 19:30:30 +0800
commit1da105df18417410462f1b8cbff9e5241bd2dd3d (patch)
treea05e981cabf4d88b80677f104f51fc5058c4155c /src/soc/intel/broadwell/refcode/usb.h
parentf51fc1ffb484b94255a94fd935ae8cda4e6c1713 (diff)
downloadcoreboot-1da105df18417410462f1b8cbff9e5241bd2dd3d.tar.xz
add PchStartUsbInit
Diffstat (limited to 'src/soc/intel/broadwell/refcode/usb.h')
-rw-r--r--src/soc/intel/broadwell/refcode/usb.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/refcode/usb.h b/src/soc/intel/broadwell/refcode/usb.h
index 93cd3e7a8a..b394cad0c3 100644
--- a/src/soc/intel/broadwell/refcode/usb.h
+++ b/src/soc/intel/broadwell/refcode/usb.h
@@ -1,6 +1,9 @@
#ifndef BDW_REFCODE_USB_H
#define BDW_REFCODE_USB_H
+int PchStartUsbInit(void *usb_pol, uintptr_t ehcibar, uintptr_t xhcibar, uint8_t revision);
+int CommonUsbInit(void *usb_pol, uintptr_t ehcibar, uintptr_t xhcibar, uint8_t bus,
+ uintptr_t rcba, uint32_t *rcba_fd, uint8_t revision);
void finalize_usb(void);
#endif