diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2018-11-29 13:36:54 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-05 13:32:42 +0000 |
commit | 90cca5422d2d44ee96cbcd420a878b2fb1b3e111 (patch) | |
tree | 8d5f2e8c8b54ae2a0c69a8eb2e673d4feb03efe9 /src/soc/intel/broadwell/romstage/Makefile.inc | |
parent | 9fca297ca44eb388229523f820f57f795b49af15 (diff) | |
download | coreboot-90cca5422d2d44ee96cbcd420a878b2fb1b3e111.tar.xz |
soc/intel/broadwell: Implement postcar stage
This does the following:
- Reuse the cpu/intel/car/non-evict CAR setup and exit.
- Use postcar_frame functions to set up the postcar frame
Change-Id: I428832a2d7e46ce61a7f9bd498b609feb4518eb0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/romstage/Makefile.inc')
-rw-r--r-- | src/soc/intel/broadwell/romstage/Makefile.inc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/broadwell/romstage/Makefile.inc b/src/soc/intel/broadwell/romstage/Makefile.inc index 161781285c..2d562d98ef 100644 --- a/src/soc/intel/broadwell/romstage/Makefile.inc +++ b/src/soc/intel/broadwell/romstage/Makefile.inc @@ -1,4 +1,4 @@ -cpu_incs-y += $(src)/soc/intel/broadwell/romstage/cache_as_ram.inc +cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S romstage-y += cpu.c romstage-y += pch.c @@ -8,6 +8,5 @@ romstage-y += report_platform.c romstage-y += romstage.c romstage-y += smbus.c romstage-y += spi.c -romstage-y += stack.c romstage-y += systemagent.c romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c |