soc/intel/broadwell: Implement postcar stage

This does the following:
- Reuse the cpu/intel/car/non-evict CAR setup and exit.
- Use postcar_frame functions to set up the postcar frame

Change-Id: I428832a2d7e46ce61a7f9bd498b609feb4518eb0
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/29927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 1 insertions, 2 deletions

diff --git a/src/soc/intel/broadwell/romstage/Makefile.inc b/src/soc/intel/broadwell/romstage/Makefile.inc
index 161781285c..2d562d98ef 100644
--- a/src/soc/intel/broadwell/romstage/Makefile.inc
+++ b/src/soc/intel/broadwell/romstage/Makefile.inc
@@ -1,4 +1,4 @@
-cpu_incs-y += $(src)/soc/intel/broadwell/romstage/cache_as_ram.inc
+cpu_incs-y += $(src)/cpu/intel/car/non-evict/cache_as_ram.S
 
 romstage-y += cpu.c
 romstage-y += pch.c
@@ -8,6 +8,5 @@ romstage-y += report_platform.c
 romstage-y += romstage.c
 romstage-y += smbus.c
 romstage-y += spi.c
-romstage-y += stack.c
 romstage-y += systemagent.c
 romstage-$(CONFIG_DRIVERS_UART_8250MEM) += uart.c