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authorAaron Durbin <adurbin@chromium.org>2016-12-03 22:08:20 -0600
committerAaron Durbin <adurbin@chromium.org>2016-12-15 07:51:35 +0100
commit31be2c969eed74510c3546bad0dbb9a7334f5843 (patch)
treea7b5d682bfe421a34454d320ec78d04e6911f71b /src/soc/intel/broadwell/romstage/raminit.c
parentf1f322b1a883e3d50a1907e29b5aa333a0f795a8 (diff)
downloadcoreboot-31be2c969eed74510c3546bad0dbb9a7334f5843.tar.xz
soc/intel/common: remove mrc cache assumptions
Update the mrc cache implementation to use region_file. Instead of relying on memory-mapped access and pointer arithmetic use the region_devices and region_file to obtain the latest data associated with the region. This removes the need for the nvm wrapper as the region_devices can be used directly. Thus, the library is more generic and can be extended to work on different boot mediums. BUG=chrome-os-partner:56151 Change-Id: Ic14e2d2f7339e50256b4a3a297fc33991861ca44 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17717 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/soc/intel/broadwell/romstage/raminit.c')
-rw-r--r--src/soc/intel/broadwell/romstage/raminit.c16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c
index 61b1bc9cb9..1185788ea7 100644
--- a/src/soc/intel/broadwell/romstage/raminit.c
+++ b/src/soc/intel/broadwell/romstage/raminit.c
@@ -15,6 +15,7 @@
#include <arch/cbfs.h>
#include <arch/io.h>
+#include <assert.h>
#include <cbfs.h>
#include <cbmem.h>
#include <console/console.h>
@@ -41,7 +42,7 @@
*/
void raminit(struct pei_data *pei_data)
{
- const struct mrc_saved_data *cache;
+ struct region_device rdev;
struct memory_info* mem_info;
pei_wrapper_entry_t entry;
int ret;
@@ -51,10 +52,12 @@ void raminit(struct pei_data *pei_data)
if (vboot_recovery_mode_enabled()) {
/* Recovery mode does not use MRC cache */
printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n");
- } else if (!mrc_cache_get_current(&cache)) {
+ } else if (!mrc_cache_get_current(MRC_TRAINING_DATA, 0, &rdev)) {
/* MRC cache found */
- pei_data->saved_data_size = cache->size;
- pei_data->saved_data = &cache->data[0];
+ pei_data->saved_data_size = region_device_sz(&rdev);
+ pei_data->saved_data = rdev_mmap_full(&rdev);
+ /* Assume boot device is memory mapped. */
+ assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED));
} else if (pei_data->boot_mode == ACPI_S3) {
/* Waking from S3 and no cache. */
printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n");
@@ -118,8 +121,9 @@ void raminit(struct pei_data *pei_data)
pei_data->data_to_save_size);
if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0)
- mrc_cache_stash_data(pei_data->data_to_save,
- pei_data->data_to_save_size);
+ mrc_cache_stash_data(MRC_TRAINING_DATA, 0,
+ pei_data->data_to_save,
+ pei_data->data_to_save_size);
printk(BIOS_DEBUG, "create cbmem for dimm information\n");
mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info));