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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-13 22:16:25 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-18 15:25:35 +0000 |
| commit | 8950cfb66f8f1fd4b047fbef2347134be0aeacec (patch) | |
| tree | 57943bfb4f8d74c2d1a4bfbd2a9813ac27e510dd /src/soc/intel/broadwell/romstage | |
| parent | 4af4e7f06eddad71f86eda3e401967e79d3a9ddb (diff) | |
| download | coreboot-8950cfb66f8f1fd4b047fbef2347134be0aeacec.tar.xz | |
soc/intel: Use config_of()
Change-Id: I0727a6b327410197cf32f598d1312737744386b3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Diffstat (limited to 'src/soc/intel/broadwell/romstage')
| -rw-r--r-- | src/soc/intel/broadwell/romstage/pch.c | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/src/soc/intel/broadwell/romstage/pch.c b/src/soc/intel/broadwell/romstage/pch.c index ea2726bfa5..0bd4ccd471 100644 --- a/src/soc/intel/broadwell/romstage/pch.c +++ b/src/soc/intel/broadwell/romstage/pch.c @@ -76,13 +76,9 @@ const struct reg_script pch_interrupt_init_script[] = { static void pch_enable_lpc(void) { /* Lookup device tree in romstage */ - const struct device *dev; const config_t *config; - dev = pcidev_on_root(PCH_DEV_SLOT_LPC, 0); - if (!dev || !dev->chip_info) - return; - config = dev->chip_info; + config = config_of_path(PCH_DEVFN_LPC); pci_write_config32(PCH_DEV_LPC, LPC_GEN1_DEC, config->gen1_dec); pci_write_config32(PCH_DEV_LPC, LPC_GEN2_DEC, config->gen2_dec); |