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| author | Matt DeVillier <matt.devillier@gmail.com> | 2018-02-19 17:35:55 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-03-01 16:10:25 +0000 |
| commit | 0f49bbceef3ee4d0755c5784c3dd647528b3c7bc (patch) | |
| tree | d8a0a74920d20a3ba3fbe134496036458dd42259 /src/soc/intel/broadwell/spi.c | |
| parent | 81a6f109bab8f58984603fbd534e2548be290480 (diff) | |
| download | coreboot-0f49bbceef3ee4d0755c5784c3dd647528b3c7bc.tar.xz | |
soc/intel/broadwell: Generate ACPI DMAR table
If the SoC is VT-d capable, write an ACPI DMAR table. The entry for the
GFXVTBAR is only generated if the IGD is enabled.
Change-Id: Id7c899954f1bae9d2b48532ca5ee271944f0c5f6
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/23821
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/broadwell/spi.c')
0 files changed, 0 insertions, 0 deletions