src/soc/intel: Drop unneeded empty lines

Change-Id: Id93aab5630e928ee4d7e957801e15a4cc8739fae
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44594
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

7 files changed, 0 insertions, 12 deletions

diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c
index b85b663cc4..bec62fba2f 100644
--- a/src/soc/intel/broadwell/finalize.c
+++ b/src/soc/intel/broadwell/finalize.c
@@ -65,7 +65,6 @@ const struct reg_script pch_finalize_script[] = {
 	/* PMSYNC */
 	REG_MMIO_OR32(RCBA_BASE_ADDRESS + PMSYNC_CONFIG, (1 << 31)),
 
-
 	REG_SCRIPT_END
 };
 
diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h
index 39c48d3f3f..bc9f220af7 100644
--- a/src/soc/intel/broadwell/include/soc/pei_data.h
+++ b/src/soc/intel/broadwell/include/soc/pei_data.h
@@ -63,7 +63,6 @@ struct usb3_port_setting {
 #define PEI_DIMM_INFO_PART_NUMBER_SIZE	19
 #define PEI_DIMM_INFO_TOTAL		8	/* Maximum num of dimm is 8 */
 
-
 /**
  * This table is filled by the MRC blob and used to populate the mem_info
  * struct, which is placed in CBMEM and then used to generate SMBIOS type
diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c
index 11b21ac959..fa44c7c79d 100644
--- a/src/soc/intel/broadwell/me_status.c
+++ b/src/soc/intel/broadwell/me_status.c
@@ -13,7 +13,6 @@
 		(__array__)[(__index__)] : \
 		(__default__))
 
-
 static inline void me_read_dword_ptr(void *ptr, int offset)
 {
 	u32 dword = pci_read_config32(PCH_DEV_ME, offset);
diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c
index 502a046474..92cf3637f9 100644
--- a/src/soc/intel/broadwell/pmutil.c
+++ b/src/soc/intel/broadwell/pmutil.c
@@ -52,7 +52,6 @@ static void print_gpio_status(u32 status, int start)
 	}
 }
 
-
 /*
  * PM1_CNT
  */
@@ -73,7 +72,6 @@ void disable_pm1_control(u32 mask)
 	outl(pm1_cnt, ACPI_BASE_ADDRESS + PM1_CNT);
 }
 
-
 /*
  * PM1
  */
@@ -122,7 +120,6 @@ void enable_pm1(u16 events)
 	outw(events, ACPI_BASE_ADDRESS + PM1_EN);
 }
 
-
 /*
  * SMI
  */
@@ -193,7 +190,6 @@ void disable_smi(u32 mask)
 	outl(smi_en, ACPI_BASE_ADDRESS + SMI_EN);
 }
 
-
 /*
  * ALT_GP_SMI
  */
@@ -244,7 +240,6 @@ void enable_alt_smi(u32 mask)
 	outl(alt_en, GPIO_BASE_ADDRESS + GPIO_ALT_GPI_SMI_EN);
 }
 
-
 /*
  * TCO
  */
@@ -312,7 +307,6 @@ void enable_tco_sci(void)
 	enable_gpe(TCOSCI_EN);
 }
 
-
 /*
  * GPE0
  */
diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c
index e7135f79b0..b1d953ef73 100644
--- a/src/soc/intel/broadwell/sata.c
+++ b/src/soc/intel/broadwell/sata.c
@@ -200,7 +200,6 @@ static void sata_init(struct device *dev)
 				<< SATA_DTLE_EDGE_SHIFT);
 	}
 
-
 	/*
 	 * Additional Programming Requirements for Power Optimizer
 	 */
diff --git a/src/soc/intel/broadwell/smihandler.c b/src/soc/intel/broadwell/smihandler.c
index 8dbb40f2b7..1732ef7803 100644
--- a/src/soc/intel/broadwell/smihandler.c
+++ b/src/soc/intel/broadwell/smihandler.c
@@ -465,7 +465,6 @@ static void southbridge_smi_monitor(void)
 			mask |= (0xff << ((i - 16) << 2));
 	}
 
-
 	/* IOTRAP(3) SMI function call */
 	if (IOTRAP(3)) {
 		if (gnvs && gnvs->smif)
diff --git a/src/soc/intel/broadwell/smmrelocate.c b/src/soc/intel/broadwell/smmrelocate.c
index 03ed24494b..3d4162abd0 100644
--- a/src/soc/intel/broadwell/smmrelocate.c
+++ b/src/soc/intel/broadwell/smmrelocate.c
@@ -18,7 +18,6 @@
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
 
-
 static void update_save_state(int cpu, uintptr_t curr_smbase,
 				uintptr_t staggered_smbase,
 				struct smm_relocation_params *relo_params)