diff options
author | Furquan Shaikh <furquan@google.com> | 2020-05-02 10:24:23 -0700 |
---|---|---|
committer | Furquan Shaikh <furquan@google.com> | 2020-05-02 18:45:16 +0000 |
commit | 76cedd2c292352d7dbd45fab70ec272e476d0910 (patch) | |
tree | 21fa0e33a2324e2ab93f38a90f6efd1a49ecdd76 /src/soc/intel/broadwell | |
parent | e0844636aca974449c7257e846ec816db683d0b9 (diff) | |
download | coreboot-76cedd2c292352d7dbd45fab70ec272e476d0910.tar.xz |
acpi: Move ACPI table support out of arch/x86 (3/5)
This change moves all ACPI table support in coreboot currently living
under arch/x86 into common code to make it architecture
independent. ACPI table generation is not really tied to any
architecture and hence it makes sense to move this to its own
directory.
In order to make it easier to review, this change is being split into
multiple CLs. This is change 3/5 which basically is generated by
running the following command:
$ git grep -iIl "arch/acpi" | xargs sed -i 's/arch\/acpi/acpi\/acpi/g'
BUG=b:155428745
Change-Id: I16b1c45d954d6440fb9db1d3710063a47b582eae
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40938
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r-- | src/soc/intel/broadwell/acpi.c | 4 | ||||
-rw-r--r-- | src/soc/intel/broadwell/igd.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/include/soc/acpi.h | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/include/soc/pm.h | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/lpc.c | 4 | ||||
-rw-r--r-- | src/soc/intel/broadwell/me.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/pmutil.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/ramstage.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/refcode.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/systemagent.c | 2 | ||||
-rw-r--r-- | src/soc/intel/broadwell/xhci.c | 2 |
11 files changed, 13 insertions, 13 deletions
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 503e1799b5..8afdba158a 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> -#include <arch/acpigen.h> +#include <acpi/acpi.h> +#include <acpi/acpigen.h> #include <arch/smp/mpspec.h> #include <cbmem.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index b030d44c39..294fbdef9d 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <bootmode.h> diff --git a/src/soc/intel/broadwell/include/soc/acpi.h b/src/soc/intel/broadwell/include/soc/acpi.h index 2d39707f78..049393c9a5 100644 --- a/src/soc/intel/broadwell/include/soc/acpi.h +++ b/src/soc/intel/broadwell/include/soc/acpi.h @@ -4,7 +4,7 @@ #ifndef _BROADWELL_ACPI_H_ #define _BROADWELL_ACPI_H_ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <soc/nvs.h> /* P-state configuration */ diff --git a/src/soc/intel/broadwell/include/soc/pm.h b/src/soc/intel/broadwell/include/soc/pm.h index ea6beb15f1..5f512b8d4e 100644 --- a/src/soc/intel/broadwell/include/soc/pm.h +++ b/src/soc/intel/broadwell/include/soc/pm.h @@ -4,7 +4,7 @@ #ifndef _BROADWELL_PM_H_ #define _BROADWELL_PM_H_ -#include <arch/acpi.h> +#include <acpi/acpi.h> /* ACPI_BASE_ADDRESS / PMBASE */ diff --git a/src/soc/intel/broadwell/lpc.c b/src/soc/intel/broadwell/lpc.c index af3be9e132..4b4969ccb4 100644 --- a/src/soc/intel/broadwell/lpc.c +++ b/src/soc/intel/broadwell/lpc.c @@ -11,7 +11,7 @@ #include <arch/io.h> #include <device/pci_ops.h> #include <arch/ioapic.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cpu/x86/smm.h> #include <cbmem.h> #include <reg_script.h> @@ -27,7 +27,7 @@ #include <soc/ramstage.h> #include <soc/rcba.h> #include <soc/intel/broadwell/chip.h> -#include <arch/acpigen.h> +#include <acpi/acpigen.h> #include <southbridge/intel/common/rtc.h> static void pch_enable_ioapic(struct device *dev) diff --git a/src/soc/intel/broadwell/me.c b/src/soc/intel/broadwell/me.c index afe9c82705..e6f3849f03 100644 --- a/src/soc/intel/broadwell/me.c +++ b/src/soc/intel/broadwell/me.c @@ -9,7 +9,7 @@ * not used unless the console loglevel is high enough. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c index 910df61795..cecac7fe4b 100644 --- a/src/soc/intel/broadwell/pmutil.c +++ b/src/soc/intel/broadwell/pmutil.c @@ -6,7 +6,7 @@ * and the differences between PCH variants. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <arch/io.h> #include <bootmode.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c index a0c6e4f497..2849d3c254 100644 --- a/src/soc/intel/broadwell/ramstage.c +++ b/src/soc/intel/broadwell/ramstage.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */ -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cbmem.h> #include <device/device.h> #include <string.h> diff --git a/src/soc/intel/broadwell/refcode.c b/src/soc/intel/broadwell/refcode.c index f54a4947a2..8c0b726bd3 100644 --- a/src/soc/intel/broadwell/refcode.c +++ b/src/soc/intel/broadwell/refcode.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <string.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <cbmem.h> #include <console/console.h> #include <console/streams.h> diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c index 8b5dc0cc60..ac1008b2b1 100644 --- a/src/soc/intel/broadwell/systemagent.c +++ b/src/soc/intel/broadwell/systemagent.c @@ -2,7 +2,7 @@ /* This file is part of the coreboot project. */ #include <console/console.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/pci_ops.h> #include <stdint.h> #include <delay.h> diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c index 2eb82a20a8..10fa9214b9 100644 --- a/src/soc/intel/broadwell/xhci.c +++ b/src/soc/intel/broadwell/xhci.c @@ -5,7 +5,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <arch/acpi.h> +#include <acpi/acpi.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <soc/ramstage.h> |