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| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-06-22 14:49:20 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-06-23 08:22:54 +0200 |
| commit | f1db074bc4c6471d8092d14febdec56956f857e8 (patch) | |
| tree | eabc29c55eed6faa5c89c222f570871acb4c9518 /src/soc/intel/broadwell | |
| parent | ad8382a3ee9d23a45c52cda997fb91f8f45e9e44 (diff) | |
| download | coreboot-f1db074bc4c6471d8092d14febdec56956f857e8.tar.xz | |
broadwell: fix typo
It's guarded by a non-standard configuration option, so didn't trigger.
Change-Id: Ib7a9a45befcb7857edde37e20de7d65a60970882
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10623
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/romstage/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index e950b1ec6f..27fb0f28c5 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -126,7 +126,7 @@ void romstage_common(struct romstage_params *params) printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); #if CONFIG_LPC_TPM - init_tpm(prev_sleep_state == SLEEP_STATE_S3); + init_tpm(params->power_state->prev_sleep_state == SLEEP_STATE_S3); #endif } |