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authorEugene Myers <edmyers@tycho.nsa.gov>2020-01-21 16:46:16 -0500
committerPatrick Georgi <pgeorgi@google.com>2020-02-04 18:54:01 +0000
commitebc8423cbcb0bcd95c45e68cdf04af9f10be1bfe (patch)
tree1bdfad8f25beaed979639b5e2f0b302d84f99045 /src/soc/intel/broadwell
parentc9ac0bcb9827ab2bef5fd7548eb13302cfd9c57d (diff)
downloadcoreboot-ebc8423cbcb0bcd95c45e68cdf04af9f10be1bfe.tar.xz
soc/intel: Add get_pmbase
Originally a part of security/intel/stm. Add get_pmbase to the intel platform setup code. get_pmbase is used by the coreboot STM setup functions to ensure that the pmbase is accessable by the SMI handler during runtime. The pmbase has to be accounted for in the BIOS resource list so that the SMI handler is allowed this access. Change-Id: If6f6295c5eba9eb20e57ab56e7f965c8879e93d2 Signed-off-by: Eugene D. Myers <edmyers@tycho.nsa.gov> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37990 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell')
-rw-r--r--src/soc/intel/broadwell/include/soc/pm.h3
-rw-r--r--src/soc/intel/broadwell/pmutil.c6
2 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pm.h b/src/soc/intel/broadwell/include/soc/pm.h
index 18004fa77d..c9074d8a0b 100644
--- a/src/soc/intel/broadwell/include/soc/pm.h
+++ b/src/soc/intel/broadwell/include/soc/pm.h
@@ -155,4 +155,7 @@ void disable_gpe(uint32_t mask);
/* Return the selected ACPI SCI IRQ */
int acpi_sci_irq(void);
+/* STM Support */
+uint16_t get_pmbase(void);
+
#endif
diff --git a/src/soc/intel/broadwell/pmutil.c b/src/soc/intel/broadwell/pmutil.c
index 00db6156ec..2445dfacf6 100644
--- a/src/soc/intel/broadwell/pmutil.c
+++ b/src/soc/intel/broadwell/pmutil.c
@@ -458,3 +458,9 @@ int vboot_platform_is_resuming(void)
return acpi_sleep_from_pm1(inl(ACPI_BASE_ADDRESS + PM1_CNT)) == ACPI_S3;
}
+
+/* STM Support */
+uint16_t get_pmbase(void)
+{
+ return (uint16_t) ACPI_BASE_ADDRESS;
+}