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author | Subrata Banik <subrata.banik@intel.com> | 2020-09-23 19:17:12 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-09-27 03:03:06 +0000 |
commit | 8ff80b269d3e94c46d88c135f5f0e41e7c626905 (patch) | |
tree | d52d1bc999a7caff1abdf847876649526aaf36fa /src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl | |
parent | ed6604d1f571f020471886172b896132406d0415 (diff) | |
download | coreboot-8ff80b269d3e94c46d88c135f5f0e41e7c626905.tar.xz |
soc/intel/common/block/acpi: Factor out common gpio_op.asl
This patch moves gpio_op.asl into common block acpi directory to
avoid duplicating the same ASL code block across SoC directory.
TEST=Able to build and boot TGL, CNL and CML platform.
1) Dump and disassemble DSDT, verify all methods present inside
common gpio_op.asl like GRXS, GTXS etc. are still there.
2) Verify no ACPI error seen while running 'dmesg` from console.
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I248f5e66994d2f3d6b0bd398347e7cf9ae7f2cc6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl')
-rw-r--r-- | src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl index da0756f62a..5b3123df2c 100644 --- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl +++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <soc/gpio_defs_cnp_h.h> +#include <soc/intel/common/block/acpi/acpi/gpio_op.asl> #include <soc/irq.h> #include <soc/pcr_ids.h> -#include "gpio_op.asl" Device (GPIO) { |