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author | Subrata Banik <subrata.banik@intel.com> | 2018-11-06 16:59:56 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2018-11-07 16:41:49 +0000 |
commit | 69b18f0b6826ecfd794594b4ae5ebf299e9378ba (patch) | |
tree | 5659c9834831295b6d05a1fe1f3c05ad6e8f53b7 /src/soc/intel/cannonlake/acpi/southbridge.asl | |
parent | 85376bfd9b018820e84fec92471d13717ad14083 (diff) | |
download | coreboot-69b18f0b6826ecfd794594b4ae5ebf299e9378ba.tar.xz |
mb/{intel/google}: Move CNVi ASL entry from static DSDT to dynamic SSDT generation
This changes uses drivers/intel/wifi chip for CNVi device to ensure that:
1. Correct device name shows in ACPI name space
2. Correct wake up shows in cat /proc/acpi/wakeup
3. Remove cnvi.asl from soc/intel/cannonlake
Change-Id: Ic81de2dce6045ced913766790a40ed19119f5118
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/29399
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi/southbridge.asl')
-rw-r--r-- | src/soc/intel/cannonlake/acpi/southbridge.asl | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index 49b5f6e509..eabff66738 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -60,8 +60,5 @@ /* PCI _OSC */ #include <soc/intel/common/acpi/pci_osc.asl> -/* CNVi */ -#include "cnvi.asl" - /* GBe 0:1f.6 */ #include "pch_glan.asl" |