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authorSubrata Banik <subrata.banik@intel.com>2018-11-13 20:55:33 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-11-15 11:18:07 +0000
commit75bdd43eb191b408c38c7bb9219c9bb5560cb643 (patch)
tree883f85a38b36c670399e20834a03989d30dc9e1f /src/soc/intel/cannonlake/acpi/southbridge.asl
parenteeabd199f37b04c06e2ba02e87465404b681e7ec (diff)
downloadcoreboot-75bdd43eb191b408c38c7bb9219c9bb5560cb643.tar.xz
soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices
Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call due to PCH requirement change from CNP PCH onwards, hence making static IRQ mapping for pci_irqs.asl and pcie.asl Also remove unused irqlinks.asl from soc/intel/cannonlake/acpi/ Change-Id: I35e2ed150a1db195fc9ce13897e65b23fc8b7ca1 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/29628 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi/southbridge.asl')
-rw-r--r--src/soc/intel/cannonlake/acpi/southbridge.asl3
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl
index eabff66738..dfa29751a6 100644
--- a/src/soc/intel/cannonlake/acpi/southbridge.asl
+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl
@@ -20,9 +20,6 @@
#include <soc/itss.h>
#include <soc/pcr_ids.h>
-/* Interrupt Routing */
-#include "irqlinks.asl"
-
/* PCI IRQ assignment */
#include "pci_irqs.asl"