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author | Subrata Banik <subrata.banik@intel.com> | 2020-09-29 14:28:09 +0530 |
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committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-03 04:18:46 +0000 |
commit | 78463a7d26506d6e38917e9bf98ac0dd82663565 (patch) | |
tree | 015c8c8ed87f030ecac790f29431b9cb7d89e8c5 /src/soc/intel/cannonlake/acpi | |
parent | 1366e4438d07c2de905454421e18d1e5f68de47d (diff) | |
download | coreboot-78463a7d26506d6e38917e9bf98ac0dd82663565.tar.xz |
soc/intel: Move soc_pch_pirq_init() to common code
List of changes:
1. Rename soc_pch_pirq_init() as pch_pirq_init() and
move into common block code.
2. Remove redundant LPC functions from SoC directory and
refer from block/lpc directory.
TEST=Able to build and boot hatch and tglrvp platform without seeing
any functional impact.
Change-Id: I856b5ca024e58fd14b4d1721f23d9516a283ebf8
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake/acpi')
-rw-r--r-- | src/soc/intel/cannonlake/acpi/pci_irqs.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/acpi/pci_irqs.asl b/src/soc/intel/cannonlake/acpi/pci_irqs.asl index d35f4d76b9..17e3aa51c6 100644 --- a/src/soc/intel/cannonlake/acpi/pci_irqs.asl +++ b/src/soc/intel/cannonlake/acpi/pci_irqs.asl @@ -76,7 +76,7 @@ Name (PICP, Package () { Name (PICN, Package () { /* - * If the setting change in soc_pch_pirq_init(), then + * If the setting change in pch_pirq_init(), then * please make the same static IRQ changes here as well. */ /* D31: cAVS, SMBus, GbE, Nothpeak */ |