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authorLijian Zhao <lijian.zhao@intel.com>2019-02-15 05:36:50 -0800
committerDuncan Laurie <dlaurie@chromium.org>2019-02-19 22:00:40 +0000
commit34745f613f4a2970b2298bd76bfaf737229a4a3a (patch)
tree4db539a93bfdd12f843b366673fae26a6eb45ae7 /src/soc/intel/cannonlake/bootblock
parent04aae87da74a8c47abb46958384ef5632fec1e4a (diff)
downloadcoreboot-34745f613f4a2970b2298bd76bfaf737229a4a3a.tar.xz
soc/intel/common: Add whiskeylake celeron v-0 support
New whiskeylake v-0 stepping have changed the graphics device id from 0x3EA0 to 0x3EA1 for celeron, so declare that in common code. Also the CPUID was changed from 806EB to 806EC, include that as well. Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Change-Id: Ief5213a96507124b90f8dd2eeea2f6bf43843dc6 Reviewed-on: https://review.coreboot.org/c/31433 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
-rw-r--r--src/soc/intel/cannonlake/bootblock/report_platform.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 8839816591..e61c7f4a93 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -37,6 +37,7 @@ static struct {
{ CPUID_CANNONLAKE_C0, "Cannonlake C0" },
{ CPUID_CANNONLAKE_D0, "Cannonlake D0" },
{ CPUID_COFFEELAKE_D0, "Coffeelake D0" },
+ { CPUID_WHISKEYLAKE_V0, "Whiskeylake V0"},
{ CPUID_WHISKEYLAKE_W0, "Whiskeylake W0"},
{ CPUID_COFFEELAKE_U0, "Coffeelake U0 (6+2)" },
};