diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-16 22:18:52 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-21 20:37:57 +0000 |
| commit | b3dfcb863cdc62cd2cb65e97e0043311b151c558 (patch) | |
| tree | 1fbd8b130d79599f82212e719781d52f6b5e32c2 /src/soc/intel/cannonlake/bootblock | |
| parent | 7a357eb8657fd891aad33fd710d2f9d4d80c9130 (diff) | |
| download | coreboot-b3dfcb863cdc62cd2cb65e97e0043311b151c558.tar.xz | |
soc/intel/cannonlake: Enable common PMC code for CNL
This update changes Cannonlake to use the new common PMC code. This
will help to reduce code duplication and streamline code bring up.
Change-Id: Ia69fee8985e1c39b0e4b104c51439bca1a5493ac
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/bootblock')
| -rw-r--r-- | src/soc/intel/cannonlake/bootblock/pch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/pch.c b/src/soc/intel/cannonlake/bootblock/pch.c index 21a06e4ff5..0062c0d61c 100644 --- a/src/soc/intel/cannonlake/bootblock/pch.c +++ b/src/soc/intel/cannonlake/bootblock/pch.c @@ -26,7 +26,7 @@ #include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> -#include <soc/pmc.h> +#include <soc/pm.h> #include <soc/smbus.h> #define PCR_PSF3_TO_SHDW_PMC_REG_BASE 0x1400 |