diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-02-05 18:14:11 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-02-08 20:02:59 +0000 |
| commit | 93fde11aefe108fd8f619239fb17f056bea3a778 (patch) | |
| tree | 4c24e1e5c9db6c955ce35afff6be82d1072079a0 /src/soc/intel/cannonlake/chip.c | |
| parent | 6b78b73d79265923cae507e8bd696646ee5ffa7d (diff) | |
| download | coreboot-93fde11aefe108fd8f619239fb17f056bea3a778.tar.xz | |
soc/intel/cannonlake: Add support for EMMC DLL update
Add option to have customized DLL setting for EMMC interface to make
EMMC able to run at HS400 speed.
BUG=None
Change-Id: I38bc022d8c05dd1fbd03dc26aa6f33cd249e8248
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/23600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.c')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index f05b55abf5..68f95d3df3 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -262,6 +262,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* eMMC and SD */ params->ScsEmmcEnabled = config->ScsEmmcEnabled; params->ScsEmmcHs400Enabled = config->ScsEmmcHs400Enabled; + params->PchScsEmmcHs400DllDataValid = config->EmmcHs400DllNeed; + if (config->EmmcHs400DllNeed == 1) { + params->PchScsEmmcHs400RxStrobeDll1 = + config->EmmcHs400RxStrobeDll1; + params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll; + } params->ScsSdCardEnabled = config->ScsSdCardEnabled; params->ScsUfsEnabled = config->ScsUfsEnabled; |