diff options
author | Jonas Loeffelholz <Jonas.Loeffelholz@9elements.com> | 2020-06-25 13:50:58 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-01 05:22:29 +0000 |
commit | d7238eb5180da0272be4212a9c6c54c685234b99 (patch) | |
tree | cf71eac1c3727882e81d2d789e0ecdac9b262648 /src/soc/intel/cannonlake/chip.h | |
parent | abd3cae588856afa4bebac2d100ca22f61a17175 (diff) | |
download | coreboot-d7238eb5180da0272be4212a9c6c54c685234b99.tar.xz |
soc/intel/cannonlake: make satahotplug user configurable via devicetree
Hook up the FSP UPD
Change-Id: I6b479bfc83492440eac97cdc8dcc560b6abf4fdf
Signed-off-by: Jonas Loeffelholz <Jonas.Loeffelholz@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42803
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
-rw-r--r-- | src/soc/intel/cannonlake/chip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 57922e131c..2923efc555 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -147,6 +147,7 @@ struct soc_intel_cannonlake_config { uint8_t SataPortsEnable[8]; uint8_t SataPortsDevSlp[8]; uint8_t SataPortsDevSlpResetConfig[8]; + uint8_t SataPortsHotPlug[8]; /* Enable/Disable SLP_S0 with GBE Support. 0: disable, 1: enable */ uint8_t SlpS0WithGbeSupport; |