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authorSridhar Siricilla <sridhar.siricilla@intel.com>2020-06-17 00:38:20 +0530
committerEdward O'Callaghan <quasisec@chromium.org>2020-06-25 13:43:01 +0000
commite40b9481e616f8b8a899ac9bb9fbf1cda20d7114 (patch)
tree2affa524a52a7c4b3edf8cf9c0469f4e3139720f /src/soc/intel/cannonlake/chip.h
parentd95dba0ce34df0a0b61e70fa89470ab113e2e918 (diff)
downloadcoreboot-e40b9481e616f8b8a899ac9bb9fbf1cda20d7114.tar.xz
soc/intel/cannonlake: Add PchPmPwrCycDur to chip options
Add PchPmPwrCycDur to chip options to control the UPD FSPS PchPmPwrCycDur from devicetree. The UPD determines the minimum time a platform will stay in reset during host partition reset with power cycle or global reset. This patch also ensures configured PchPmPwrCycDur value doesn't violate the PCH EDS specification. TEST=Verified on Hatch and Puff boards Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Change-Id: I55e836c78fab34e34d57b04428a1498b7dc7174b Reviewed-on: https://review.coreboot.org/c/coreboot/+/42440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
-rw-r--r--src/soc/intel/cannonlake/chip.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h
index 3ebbc5e38d..57922e131c 100644
--- a/src/soc/intel/cannonlake/chip.h
+++ b/src/soc/intel/cannonlake/chip.h
@@ -315,6 +315,23 @@ struct soc_intel_cannonlake_config {
uint8_t PchPmSlpAMinAssert;
/*
+ * PCH PM Reset Power Cycle Duration
+ * 0 = 4s
+ * 1 = 1s
+ * 2 = 2s
+ * 3 = 3s
+ * 4 = 4s (default)
+ *
+ * NOTE: Duration programmed in the PchPmPwrCycDur should never be smaller than the
+ * stretch duration programmed in the following registers -
+ * - GEN_PMCON_A.SLP_S3_MIN_ASST_WDTH (PchPmSlpS3MinAssert)
+ * - GEN_PMCON_A.S4MAW (PchPmSlpS4MinAssert)
+ * - PM_CFG.SLP_A_MIN_ASST_WDTH (PchPmSlpAMinAssert)
+ * - PM_CFG.SLP_LAN_MIN_ASST_WDTH
+ */
+ uint8_t PchPmPwrCycDur;
+
+ /*
* SerialIO device mode selection:
*
* Device index: