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author | Lijian Zhao <lijian.zhao@intel.com> | 2017-08-16 11:40:03 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-17 21:50:58 +0000 |
commit | 321111774ce013b35641fe6d0e03e693974b4a28 (patch) | |
tree | 38845901f282b8b0af0ec3da9bcf1d836a94de59 /src/soc/intel/cannonlake/chip.h | |
parent | 201fa8ffe5908b7fe004fa6a72ccebbde38acb9b (diff) | |
download | coreboot-321111774ce013b35641fe6d0e03e693974b4a28.tar.xz |
soc/intel/cannonlake: Add SPI flash controller driver
Add SPI driver code for the SPI flash controller, including both
fast_spi and generic_spi.
Change-Id: Ie45146721f39d3cec20ff5136adf8925c75da1cd
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.corp-partner.google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/chip.h')
-rw-r--r-- | src/soc/intel/cannonlake/chip.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index bbc58808a3..67be85dd25 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -18,9 +18,12 @@ #ifndef _SOC_CHIP_H_ #define _SOC_CHIP_H_ +#include <intelblocks/gspi.h> #include <stdint.h> struct soc_intel_cannonlake_config { + /* GSPI */ + struct gspi_cfg gspi[CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX]; }; typedef struct soc_intel_cannonlake_config config_t; |