summaryrefslogtreecommitdiff
path: root/src/soc/intel/cannonlake/include
diff options
context:
space:
mode:
authorLijian Zhao <lijian.zhao@intel.com>2017-08-16 11:40:03 -0700
committerAaron Durbin <adurbin@chromium.org>2017-08-17 21:50:58 +0000
commit321111774ce013b35641fe6d0e03e693974b4a28 (patch)
tree38845901f282b8b0af0ec3da9bcf1d836a94de59 /src/soc/intel/cannonlake/include
parent201fa8ffe5908b7fe004fa6a72ccebbde38acb9b (diff)
downloadcoreboot-321111774ce013b35641fe6d0e03e693974b4a28.tar.xz
soc/intel/cannonlake: Add SPI flash controller driver
Add SPI driver code for the SPI flash controller, including both fast_spi and generic_spi. Change-Id: Ie45146721f39d3cec20ff5136adf8925c75da1cd Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/21052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.corp-partner.google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/pci_devs.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pci_devs.h b/src/soc/intel/cannonlake/include/soc/pci_devs.h
index f00ea1f6bc..ed6b67030b 100644
--- a/src/soc/intel/cannonlake/include/soc/pci_devs.h
+++ b/src/soc/intel/cannonlake/include/soc/pci_devs.h
@@ -173,6 +173,7 @@ static inline int spi_devfn_to_bus(unsigned int devfn)
case PCH_DEVFN_SPI: return 0;
case PCH_DEVFN_GSPI0: return 1;
case PCH_DEVFN_GSPI1: return 2;
+ case PCH_DEVFN_GSPI2: return 3;
}
return -1;
}
@@ -183,6 +184,7 @@ static inline int spi_bus_to_devfn(unsigned int bus)
case 0: return PCH_DEVFN_SPI;
case 1: return PCH_DEVFN_GSPI0;
case 2: return PCH_DEVFN_GSPI1;
+ case 3: return PCH_DEVFN_GSPI2;
}
return -1;
}