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| author | Furquan Shaikh <furquan@google.com> | 2019-03-11 20:11:55 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2019-03-13 15:49:05 +0000 |
| commit | 5c19009ec710387a00df5760468b882079701432 (patch) | |
| tree | 0b1616abce2b17b3f3c56b985a3cfed1b607cc50 /src/soc/intel/cannonlake/include | |
| parent | 8296fdd979023236a95c577a90f993250e0dcbb4 (diff) | |
| download | coreboot-5c19009ec710387a00df5760468b882079701432.tar.xz | |
soc/intel/cannonlake: Allow mainboard to override DRAM part number
In order to support mainboards that do not store DRAM part number in
the traditional way i.e. within the CBFS SPD for soldered memory, this
change provides a runtime callback to allow mainboards to provide DRAM
part number from a custom location e.g. external EEPROM on hatch.
For other boards it should be a NOP since the weak implementation of
mainboard_get_dram_part_num does nothing.
BUG=b:127609572
Change-Id: I9b2d4c33fc378b9a24b111971ec2bfdb5f8d57d0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31850
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/romstage.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h index a58ace59a5..643105a0a2 100644 --- a/src/soc/intel/cannonlake/include/soc/romstage.h +++ b/src/soc/intel/cannonlake/include/soc/romstage.h @@ -20,6 +20,9 @@ #include <fsp/api.h> void mainboard_memory_init_params(FSPM_UPD *mupd); + +/* Provide a callback to allow mainboard to override the DRAM part number. */ +void mainboard_get_dram_part_num(const char **part_num, size_t *len); void systemagent_early_init(void); /* Board type */ |