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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-09-03 11:48:33 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-09 10:36:11 +0000 |
| commit | 7f29896c773da31b31d3c4da7b8bfdfaacf691ad (patch) | |
| tree | 03eb47965607f835fbf60b5bedb3c939725546db /src/soc/intel/cannonlake/include | |
| parent | c6c9b9cf486eaa1bc7892b142e9201463fc99025 (diff) | |
| download | coreboot-7f29896c773da31b31d3c4da7b8bfdfaacf691ad.tar.xz | |
soc/intel/cannonlake: Add PCIe ports on PCH-H
Fixes complains about missing INT configuration by the pciexp kernel
modules.
Tested with Linux 5.5 on Prodrive Hermes.
Change-Id: I277f592cd8d2c86a9c7ba4b34d3f703f7d593582
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/irq.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/irq.h b/src/soc/intel/cannonlake/include/soc/irq.h index 05d4025f25..1aa6036bcc 100644 --- a/src/soc/intel/cannonlake/include/soc/irq.h +++ b/src/soc/intel/cannonlake/include/soc/irq.h @@ -62,6 +62,14 @@ #define PCIE_10_IRQ 17 #define PCIE_11_IRQ 18 #define PCIE_12_IRQ 19 +#define PCIE_14_IRQ 16 +#define PCIE_15_IRQ 17 +#define PCIE_16_IRQ 18 +#define PCIE_17_IRQ 19 +#define PCIE_18_IRQ 16 +#define PCIE_19_IRQ 17 +#define PCIE_20_IRQ 18 +#define PCIE_21_IRQ 19 #define SATA_IRQ 16 |