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authorLijian Zhao <lijian.zhao@intel.com>2018-01-22 20:08:15 -0800
committerMartin Roth <martinroth@google.com>2018-02-11 00:00:41 +0000
commit1b64ae1119fc7891b043d5d29bf93859ef9dbfa1 (patch)
treebec506be9800c7bbed055a92811f844628006a7a /src/soc/intel/cannonlake/include
parent106a9fe882f329cb3dbafc56601557b1d35ac672 (diff)
downloadcoreboot-1b64ae1119fc7891b043d5d29bf93859ef9dbfa1.tar.xz
soc/intel/cannonlake: Add Pch iSCLK programming
In order to reduce BOM cost and board area for imaging solution, the sensor requires a 19.2/24MHz reference clock from PCH. In addition to that, having PCH to supply the sensor reference clock will prevent dependency on CPU power management and also avoid level shifter cost. Pch iSCLK is only required for CNP-LP with the camera sensor on the platform. BUG=None TEST=Boot up into OS and read back PCH iSCLK programming through iotools. Change-Id: I28c97a75f2a7f5122a20c8b8f0f2671037a7eca6 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/23367 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/pcr_ids.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pcr_ids.h b/src/soc/intel/cannonlake/include/soc/pcr_ids.h
index 65576aabcb..b77eab831b 100644
--- a/src/soc/intel/cannonlake/include/soc/pcr_ids.h
+++ b/src/soc/intel/cannonlake/include/soc/pcr_ids.h
@@ -25,6 +25,7 @@
#define PID_GPIOCOM0 0x6e
#define PID_DMI 0x88
#define PID_PSTH 0x89
+#define PID_ISCLK 0xad
#define PID_PSF1 0xba
#define PID_PSF2 0xbb
#define PID_PSF3 0xbc