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authorDuncan Laurie <dlaurie@google.com>2019-01-07 11:55:16 -0800
committerDuncan Laurie <dlaurie@chromium.org>2019-01-08 19:12:30 +0000
commit8601a16c9e6a043f424fab76c7fa12540cf2348b (patch)
tree6ffacbb16199cdeedfd0df34cda99f7597c14683 /src/soc/intel/cannonlake/include
parent3da1b0d439f249a3e4a056ba24890688adb88d4d (diff)
downloadcoreboot-8601a16c9e6a043f424fab76c7fa12540cf2348b.tar.xz
soc/intel/cannonlake: Add chipset event logging
Add logging of chipset events on boot into the flash event log. This was tested on a google/sarien board to ensure that events like "System Reset" are added to the log as expected. Change-Id: I38498cef36d8cc9c8a1f63d12618ea768b65254c Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/30718 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/pch.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/pch.h b/src/soc/intel/cannonlake/include/soc/pch.h
index da64a7a88f..5253053954 100644
--- a/src/soc/intel/cannonlake/include/soc/pch.h
+++ b/src/soc/intel/cannonlake/include/soc/pch.h
@@ -28,6 +28,4 @@
#define PCIE_CLK_LAN 0x70
#define PCIE_CLK_FREE 0x80
-void pch_log_state(void);
-
#endif