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authorUsha P <usha.p@intel.com>2019-11-28 10:05:45 +0530
committerPatrick Georgi <pgeorgi@google.com>2019-12-26 10:44:17 +0000
commit33ff4cc137e501b14859bc67cc7e85dd60a863cc (patch)
tree213e74f46592f0a1c029667cb339c80b0561e9ba /src/soc/intel/cannonlake/include
parent5395123b849da143d9621b67a6837defe9501acf (diff)
downloadcoreboot-33ff4cc137e501b14859bc67cc7e85dd60a863cc.tar.xz
soc/intel/cannonlake: Refactor pch_early_init() code
This patch keeps required pch_early_init() function like ABASE programming, GPE and RTC init into bootblock and moves remaining functions like TCO configuration and SMBus init into romstage/pch.c in order to maintain only required chipset programming for bootblock and verstage. Rename the pch_init function to bootblock_pch_init and romstage_pch_init according to the stage it is defined in. TEST=Able to build and boot hatch successfully. Change-Id: Idf7b04edc3fce147f7857561ce7d5b0cd05f43fe Signed-off-by: Usha P <usha.p@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37308 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/include')
-rw-r--r--src/soc/intel/cannonlake/include/soc/bootblock.h2
-rw-r--r--src/soc/intel/cannonlake/include/soc/romstage.h1
2 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/bootblock.h b/src/soc/intel/cannonlake/include/soc/bootblock.h
index a5c3c323ae..efc837eb80 100644
--- a/src/soc/intel/cannonlake/include/soc/bootblock.h
+++ b/src/soc/intel/cannonlake/include/soc/bootblock.h
@@ -23,7 +23,7 @@ void bootblock_cpu_init(void);
void bootblock_pch_early_init(void);
/* Bootblock post console init programming */
-void pch_early_init(void);
+void bootblock_pch_init(void);
void pch_early_iorange_init(void);
void report_platform_info(void);
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h
index 643105a0a2..ab20ee7e3f 100644
--- a/src/soc/intel/cannonlake/include/soc/romstage.h
+++ b/src/soc/intel/cannonlake/include/soc/romstage.h
@@ -24,6 +24,7 @@ void mainboard_memory_init_params(FSPM_UPD *mupd);
/* Provide a callback to allow mainboard to override the DRAM part number. */
void mainboard_get_dram_part_num(const char **part_num, size_t *len);
void systemagent_early_init(void);
+void romstage_pch_init(void);
/* Board type */
enum board_type {