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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-03 07:25:59 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-07-04 09:48:22 +0000 |
| commit | 903b40a8a46b6e8d853f509480661c8174311f17 (patch) | |
| tree | fd07ccd13dd831f2a30fac410c89125ed9eae1ce /src/soc/intel/cannonlake/romstage | |
| parent | 9c0e14e7c43e85e99c0bbfdff72019d908de1711 (diff) | |
| download | coreboot-903b40a8a46b6e8d853f509480661c8174311f17.tar.xz | |
soc/intel: Replace uses of dev_find_slot()
To call dev_find_slot(0, xx) in romstage can produce
invalid results since PCI bus enumeration has not
been progressed yet.
Replace this with method that relies on bus topology
that walks the root bus only.
Change-Id: I2883610059bb9fa860bba01179e7d5c58cae00e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33996
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/cannonlake/romstage')
| -rw-r--r-- | src/soc/intel/cannonlake/romstage/fsp_params.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index a1e3d76b4a..eb71f5dac5 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -30,7 +30,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config) { unsigned int i; uint32_t mask = 0; - const struct device *dev = dev_find_slot(0, PCH_DEVFN_ISH); + const struct device *dev = pcidev_path_on_root(PCH_DEVFN_ISH); /* Set IGD stolen size to 64MB. */ m_cfg->IgdDvmt50PreAlloc = 2; @@ -85,7 +85,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config) m_cfg->PchIshEnable = dev->enabled; /* If HDA is enabled, enable HDA elements */ - dev = dev_find_slot(0, PCH_DEVFN_HDA); + dev = pcidev_path_on_root(PCH_DEVFN_HDA); if (!dev) m_cfg->PchHdaEnable = 0; else @@ -100,8 +100,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, const config_t *config) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { - const struct device *dev = dev_find_slot(0, PCH_DEVFN_LPC); - const struct device *smbus = dev_find_slot(0, PCH_DEVFN_SMBUS); + const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC); + const struct device *smbus = pcidev_path_on_root(PCH_DEVFN_SMBUS); assert(dev != NULL); const config_t *config = dev->chip_info; FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; |