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| author | Shaunak Saha <shaunak.saha@intel.com> | 2020-03-24 00:24:59 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2020-05-06 15:40:41 +0000 |
| commit | 56e3df459abafdd9d00fcd0a8ddca7db4730874a (patch) | |
| tree | 5751617d4fd2db981d697805ab25a196b27290b7 /src/soc/intel/cannonlake/spi.c | |
| parent | e685107dd61461f91d3fdbf722cf378e121e2551 (diff) | |
| download | coreboot-56e3df459abafdd9d00fcd0a8ddca7db4730874a.tar.xz | |
soc/intel/tgl: Synchronize GPIO ASL table with Linux kernel
Kernel pinctrl driver changed for Tiger Lake and went to old scheme.
Kernel patch: https://chromium-review.googlesource.com/c/chromiumos/
third_party/kernel/+/2116670
BUG=b:151683980
BRANCH=none
TEST=Build and boot tgl board. In /sys/kernel/debug/pinctrl
verify INTC34C5:00 listing all the pins.
Cq-Depend:chromium:2116670
Change-Id: I9f1d399ff7380125ad5b935f9590a7d9cc442b04
Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39801
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake/spi.c')
0 files changed, 0 insertions, 0 deletions