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authorNick Vaccaro <nvaccaro@google.com>2020-09-30 09:49:05 -0700
committerNick Vaccaro <nvaccaro@google.com>2020-10-05 18:02:22 +0000
commit0ed02d00cb129f2aa3959116e1730d4d14da2a60 (patch)
treebea8ca85a8e432f6249fad848ee9cf498446035b /src/soc/intel/cannonlake
parentaef9ac97c7b84a5ca51d97d63c4134ffb1da6615 (diff)
downloadcoreboot-0ed02d00cb129f2aa3959116e1730d4d14da2a60.tar.xz
mb, soc: change mainboard_get_dram_part_num() prototype
Change mainboard_get_dram_part_num() to return a constant character pointer to a null-terminated C string and to take no input parameters. This also addresses the issue that different SOCs and motherboards were using different definitions for mainboard_get_dram_part_num by consolidating to a single definition. BUG=b:169774661, b:168724473 TEST="emerge-volteer coreboot && emerge-dedede coreboot && emerge-hatch coreboot" and verify build completes successfully. Change-Id: Ie7664eab65a2b9e25b7853bf68baf2525b040487 Signed-off-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45873 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/include/soc/romstage.h2
-rw-r--r--src/soc/intel/cannonlake/romstage/romstage.c24
2 files changed, 17 insertions, 9 deletions
diff --git a/src/soc/intel/cannonlake/include/soc/romstage.h b/src/soc/intel/cannonlake/include/soc/romstage.h
index 4e513f0f3c..f99175f769 100644
--- a/src/soc/intel/cannonlake/include/soc/romstage.h
+++ b/src/soc/intel/cannonlake/include/soc/romstage.h
@@ -8,7 +8,7 @@
void mainboard_memory_init_params(FSPM_UPD *mupd);
/* Provide a callback to allow mainboard to override the DRAM part number. */
-void mainboard_get_dram_part_num(const char **part_num, size_t *len);
+const char *mainboard_get_dram_part_num(void);
void systemagent_early_init(void);
void romstage_pch_init(void);
diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index c56add7fb8..e8947f1ea4 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -23,9 +23,10 @@
0x8d, 0x09, 0x11, 0xcf, 0x8b, 0x9f, 0x03, 0x23 \
}
-void __weak mainboard_get_dram_part_num(const char **part_num, size_t *len)
+const char * __weak mainboard_get_dram_part_num(void)
{
/* Default weak implementation, no need to override part number. */
+ return NULL;
}
/* Save the DIMM information for SMBIOS table 17 */
@@ -42,7 +43,8 @@ static void save_dimm_info(void)
const uint8_t smbios_memory_info_guid[16] =
FSP_SMBIOS_MEMORY_INFO_GUID;
const char *dram_part_num;
- size_t dram_part_num_len;
+ size_t dram_part_num_len = 0;
+ bool part_num_overridden = false;
/* Locate the memory info HOB, presence validated by raminit */
memory_info_hob = fsp_find_extension_hob_by_guid(
@@ -64,6 +66,13 @@ static void save_dimm_info(void)
}
memset(mem_info, 0, sizeof(*mem_info));
+ /* Allow mainboard to override DRAM part number. */
+ dram_part_num = mainboard_get_dram_part_num();
+ if (dram_part_num) {
+ dram_part_num_len = strlen(dram_part_num);
+ part_num_overridden = true;
+ }
+
/* Describe the first N DIMMs in the system */
index = 0;
dimm_max = ARRAY_SIZE(mem_info->dimm);
@@ -79,13 +88,12 @@ static void save_dimm_info(void)
if (src_dimm->Status != DIMM_PRESENT)
continue;
- dram_part_num_len = sizeof(src_dimm->ModulePartNum);
- dram_part_num = (const char *)
+ if (!part_num_overridden) {
+ dram_part_num_len =
+ sizeof(src_dimm->ModulePartNum);
+ dram_part_num = (const char *)
&src_dimm->ModulePartNum[0];
-
- /* Allow mainboard to override DRAM part number. */
- mainboard_get_dram_part_num(&dram_part_num,
- &dram_part_num_len);
+ }
u8 memProfNum = memory_info_hob->MemoryProfile;