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authorNico Huber <nico.h@gmx.de>2019-08-05 19:33:09 +0200
committerNico Huber <nico.h@gmx.de>2019-08-09 09:35:22 +0000
commit733c28fa4228b1ce000d39e2807ebc3224302a7a (patch)
treecbb381e0d0da8387842f611ae9a751fc7dea06e7 /src/soc/intel/cannonlake
parent04ce8fe6e3452ece3182dcc4404b532a8754dcfe (diff)
downloadcoreboot-733c28fa4228b1ce000d39e2807ebc3224302a7a.tar.xz
soc/intel/{cnl,icl}: Use new power-failure-state API
pmc_soc_restore_power_failure() is only called from SMM, so add `pmc.c` to the `smm` class. Once all platforms moved to the new API, it can be implemented in a central place, avoiding the weak- function trap. Change-Id: Ib13eac00002232d4377f683ad92b04a0907529f3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34726 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
-rw-r--r--src/soc/intel/cannonlake/Makefile.inc1
-rw-r--r--src/soc/intel/cannonlake/pmc.c65
2 files changed, 11 insertions, 55 deletions
diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc
index 7ff86031cb..724e141d39 100644
--- a/src/soc/intel/cannonlake/Makefile.inc
+++ b/src/soc/intel/cannonlake/Makefile.inc
@@ -60,6 +60,7 @@ ramstage-y += xhci.c
smm-y += elog.c
smm-y += p2sb.c
+smm-y += pmc.c
smm-y += pmutil.c
smm-y += smihandler.c
smm-y += uart.c
diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c
index 8eadc8db89..9916fe8812 100644
--- a/src/soc/intel/cannonlake/pmc.c
+++ b/src/soc/intel/cannonlake/pmc.c
@@ -32,35 +32,22 @@
* Set which power state system will be after reapplying
* the power (from G3 State)
*/
-void pmc_set_afterg3(int s5pwr)
+void pmc_soc_set_afterg3_en(const bool on)
{
uint8_t reg8;
- uint8_t *pmcbase = pmc_mmio_regs();
+ uint8_t *const pmcbase = pmc_mmio_regs();
reg8 = read8(pmcbase + GEN_PMCON_A);
-
- switch (s5pwr) {
- case MAINBOARD_POWER_STATE_OFF:
- reg8 |= 1;
- break;
- case MAINBOARD_POWER_STATE_ON:
- reg8 &= ~1;
- break;
- case MAINBOARD_POWER_STATE_PREVIOUS:
- default:
- break;
- }
-
+ if (on)
+ reg8 &= ~SLEEP_AFTER_POWER_FAIL;
+ else
+ reg8 |= SLEEP_AFTER_POWER_FAIL;
write8(pmcbase + GEN_PMCON_A, reg8);
}
-/*
- * Set PMC register to know which state system should be after
- * power reapplied
- */
void pmc_soc_restore_power_failure(void)
{
- pmc_set_afterg3(CONFIG_MAINBOARD_POWER_FAILURE_STATE);
+ pmc_set_power_failure_state(false);
}
static void pm1_enable_pwrbtn_smi(void *unused)
@@ -119,46 +106,14 @@ static void config_deep_sx(uint32_t deepsx_config)
write32(pmcbase + DSX_CFG, reg);
}
-static void pch_power_options(void)
-{
- const char *state;
-
- const int pwr_on = CONFIG_MAINBOARD_POWER_FAILURE_STATE;
-
- /*
- * Which state do we want to goto after g3 (power restored)?
- * 0 == S5 Soft Off
- * 1 == S0 Full On
- * 2 == Keep Previous State
- */
- switch (pwr_on) {
- case MAINBOARD_POWER_STATE_OFF:
- state = "off";
- break;
- case MAINBOARD_POWER_STATE_ON:
- state = "on";
- break;
- case MAINBOARD_POWER_STATE_PREVIOUS:
- state = "state keep";
- break;
- default:
- state = "undefined";
- }
- pmc_set_afterg3(pwr_on);
- printk(BIOS_INFO, "Set power %s after power failure.\n", state);
-
- /* Set up GPE configuration. */
- pmc_gpe_init();
-}
-
static void pmc_init(void *unused)
{
- config_t *config = config_of_path(SA_DEVFN_ROOT);
+ const config_t *config = config_of_path(SA_DEVFN_ROOT);
rtc_init();
- /* Initialize power management */
- pch_power_options();
+ pmc_set_power_failure_state(true);
+ pmc_gpe_init();
config_deep_s3(config->deep_s3_enable_ac, config->deep_s3_enable_dc);
config_deep_s5(config->deep_s5_enable_ac, config->deep_s5_enable_dc);