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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-08-31 11:20:34 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-09-11 09:21:13 +0000 |
| commit | 2cc66916e5d5d5b0d2e92e180bae7ac64d30cbac (patch) | |
| tree | 6bd29385190e12d91595e9feec14f7c420b462bb /src/soc/intel/cannonlake | |
| parent | 910490f3f48d418824276045489d1ceb221e0ba1 (diff) | |
| download | coreboot-2cc66916e5d5d5b0d2e92e180bae7ac64d30cbac.tar.xz | |
soc/intel/common/block/cse: Move me_read_config32() to common code
me_read_config32() is defined in multiple places, move it to common
location. Also, this function is usually used for reading HFSTS
registers, hence move the HFSTS register definitions to common location.
Also add a funtion to check if the CSE device has been enabled in the
devicetree and it is visible on the bus. This API can be used by
the caller to check before initiating any HECI communication.
TEST=Verified reading HFSTS registers on CML RVP & Hatch board
Change-Id: Icdbfb6b30a007d469b5e018a313c14586addb130
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35225
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/me.c | 21 |
1 files changed, 6 insertions, 15 deletions
diff --git a/src/soc/intel/cannonlake/me.c b/src/soc/intel/cannonlake/me.c index b8b4245d43..cd94be5c24 100644 --- a/src/soc/intel/cannonlake/me.c +++ b/src/soc/intel/cannonlake/me.c @@ -32,16 +32,6 @@ enum { ME_WSTATE_NORMAL = 0x05, }; -/* HFSTS register offsets in PCI config space */ -enum { - PCI_ME_HFSTS1 = 0x40, - PCI_ME_HFSTS2 = 0x48, - PCI_ME_HFSTS3 = 0x60, - PCI_ME_HFSTS4 = 0x64, - PCI_ME_HFSTS5 = 0x68, - PCI_ME_HFSTS6 = 0x6C, -}; - /* Host Firmware Status Register 1 */ union hfsts1 { uint32_t raw; @@ -155,11 +145,6 @@ union hfsts6 { } __packed fields; }; -static uint32_t me_read_config32(int offset) -{ - return pci_read_config32(PCH_DEV_CSE, offset); -} - /* * From reading the documentation, this should work for both WHL and CML * platforms. Also, calling this function from dump_me_status() does not @@ -201,6 +186,9 @@ static void print_me_version(void *unused) if (!CONFIG(CONSOLE_SERIAL)) return; + if (!is_cse_enabled()) + return; + hfsts1.raw = me_read_config32(PCI_ME_HFSTS1); /* @@ -244,6 +232,9 @@ void dump_me_status(void *unused) union hfsts5 hfsts5; union hfsts6 hfsts6; + if (!is_cse_enabled()) + return; + hfsts1.raw = me_read_config32(PCI_ME_HFSTS1); hfsts2.raw = me_read_config32(PCI_ME_HFSTS2); hfsts3.raw = me_read_config32(PCI_ME_HFSTS3); |